INSPECTION & TEST

Inspection & test equipment

Wafer Inspection & Test

Metrology, defect inspection and electrical test across the whole line.

Close-up of an inspection tool and its wafer load port, a wafer map on screen in cool blue light

EQUIPMENT SCOPE

Equipment scope

  • ADVANTEST semiconductor test equipment
  • LASERTEC inspection and metrology equipment

Focused on leading Japanese brands, covering electrical test and optical or laser inspection equipment.

Close shot of a wafer map defect distribution on screen, colored points clustering into signature patterns

SERVICES

Services provided

  • Equipment procurement, evaluation and tool selection
  • Tool condition inspection and acceptance support
  • De-installation, packing and cross-border shipping
  • Move-in installation, calibration and tuning
  • Optical system and test interface maintenance
  • Inspection and test flow setup
  • Data interpretation and operator training

AI INTEGRATION

AI integration

The third-party frontier architectures BETTER benchmarks and deploys.

G2LGAN + CNN (2025)

Two-stage GAN augmentation with MobileNetV2 handles class-imbalanced wafer map defect classification.

Benchmark metric: accuracy 98.39%, F1 93.01%

Benchmark architecture

CNN-ESN (2026)

ResNet34 with an echo state network improves recognition robustness on noisy wafer maps.

Benchmark metric: 94.74% clean, 87.30% noisy

Benchmark architecture

SEMVision H20 (2025)

Deep learning image classification, trained continuously in the fab, speeds up e-beam defect review.

Benchmark metric: 3× review speed, deployed at 2nm/GAA customers

Benchmark architecture

GPU real-time adaptive test

GPU-accelerated machine learning adapts the test flow in real time and shortens test time.

Benchmark metric: Blackwell production, test time down 25%

Benchmark architecture

KGD and outlier detection (GPR, conformal prediction)

Spatial modeling and conformal prediction sharpen known good die screening and outlier detection.

Benchmark metric: outperforms DPAT, about 90% Vmin coverage guarantee

Benchmark architecture

InF-ATPG (2025)

FFR partitioning combined with QGNN and DQN optimizes test pattern generation.

Benchmark metric: backtracks down 55.06%, UFP 0.50%

Benchmark architecture

AI visualization: wafer map classification results beside a confidence bar chart

USE CASES

Where it fits

  • Lines strengthening in-line defect detection and feedback
  • Test houses under test time and test cost pressure
  • Inspection tool relocation and optical recalibration
  • Research institutes building defect analysis capability

GET IN TOUCH

Let's talk about your line

One point of contact from equipment selection through installation and AI integration.